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NXP Semiconductors /LPC5410x /DMA /SRAMBASE

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Interpret as SRAMBASE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0OFFSET

Description

SRAM address of the channel configuration table.

Fields

RESERVED

Reserved. Read value is undefined, only zero should be written.
OFFSET

Address bits 31:9 of the beginning of the DMA descriptor table. For 18 channels, the table must begin on a 512 byte boundary.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data